STMicroelectronics vacancy search engine

IC-Package Design and Modeling Engineer M/F M/F


Vacancy details

General information

Reference

2023-32495  

Job level

40 - Experienced

Position description

Posting title

IC-Package Design and Modeling Engineer M/F M/F

Regular/Temporary

Regular

Job description

OUR TECHNOLOGY STARTS WITH YOU

At ST, we believe that technology plays a key role in helping to solve environmental and social challenges while bringing a positive contribution to people’s lives. We create and deliver our technology as microchips, that form a mostly invisible part of the world we live in today.
We trust in the synergy of our talents to think, create and develop solutions for the world in which they would like to live, that’s now the time for you to join us!

The job holder will be part of Back-End Manufacturing & Technology R&D organization located in Agrate Brianza, Italy. This team is dedicated to the development of best-in-class and innovative packages for integrated circuits (ICs), in alignment with technology roadmaps.

The job holder will work on design and electrical modeling of packages, with main focus on DCI (Direct Copper Interconnect) technology.

Main job holder responsibilities will be:

- To design package structures in single-layer and multi-layer stack-up configuration, with varying complexity level from single component to System-in-Package integration of multiple devices. Specific electrical CAD tools will be used for design.

- To prepare the relevant documentation for design approval and interact with suppliers for design for manufacturing review (DFM) and first procurement

- To assess new design rules for innovative package design solutions.

- To perform quick design feasibility studies for early assessment of package technology and electrical performance.

- To assess package-level electrical performances, using dedicated electromagnetic simulation tools, dealing with power integrity, signal integrity, electromagnetic emissions, high-voltage or high-current exposure issues.

- To generate package electrical models in lumped RLC or s-parameter format, to be delivered to internal or external customers in alignment with products development scheduling.

-  To work in close cooperation with CAD vendors for design and modeling tools continuous improvement.

Profile

Education: preferred Master Degree in Electronic, Electric or Mechatronic Engineering.

Fluent in English.

Preferred knowhow on interconnection design tools (Cadence Allegro PCB or Package designer, Orcad, Mentor Graphics (Siemens) Xpedition, Altium Designer or similar).

Preferred knowhow on signal integrity, power integrity and electromagnetic compatibility topics and on related electromagnetic simulation tools dedicated to interconnections (Ansys Electronics, Cadence Sigrity, Keysight ADS, CST Studio Suite, Siemens Hyperlynx or similar).

Team spirit, curiosity, flexibility, sense of commitment, high quality standards.

We put People First: at STMicroelectronics, we are proud to be an international company, proud to offer an open and connected work environment, and above all, proud of our team’s diversity. Committed to empowering all people to realize their potential through a culture of autonomy, creativity and personal development.

Sustainability We create technology for a sustainable world in a sustainable way, we prioritize people and the planet. ST is committed to become carbon neutral and to source 100% renewable energy by 2027.

The Employment search is addressed to candidates of both genders, under Law 10.04.1991 n. 125, as amended by Legislative Decree n. 198/2006 which guarantees gender equality at work

Position location

Job location

Europe, Italy, Agrate

Candidate criteria

Education level required

5 - Master degree

Experience level required

2-5 years

Languages

English (2- Business fluent)

Requester

Desired start date

01/05/2023