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PhD: Designer of in-situ SoC devices for analog characterization M/F

General information


  Location: Europe, France, Crolles

Type of contract: Temporary

Job open date: 27/09/2020

Company department: Analog Design FE


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PhD objective is to enable in-situ analog devices characterization for fully processed System On Chips.
Active (transistors…) and passive (resistors…) devices analog characteristics (I(V)…) are measured on wafers using scribe lanes test structures during parametric test. But the same characteristics for those devices when located within SoC (System On Chip) cannot be measured. PhD objective is to enable it.
The first step is to focus on testchips in-situ transistors characteristics measurement using addressable array techniques. Benefit will be for technology platforms qualification. Solution is technology generic and demonstration will be opportunistic as per testchips roadmap.
The second step is to further extend that solution to other devices and to SoC produced by ST, which will bring significant benefit in particular when manufactured by a third party.



  •  Analog design profile:
    Semiconductor characteristic knowledge
    Full custom flow, Schematic & Layout Analog Design (Cadence Environment)
    Spice simulation (Eldo, Spectre, etc.)

    PhD profile:
    Research Autonomy 
    Solving problem mind 
    Concise and curious
    Good interpersonal and teamwork skills
  •  5 - Master degree
  •  Less than 2 years



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